;_______________________________________________________________________________ ; Subroutine to write command/data to TM1637. On entry TM_dat has byte to send. ; Entrypoint for command is: TM_cmd, for data write is: TM_wrt. (by A. Daas) ; Assume CLK and DIO are both set as input and TM_CLK and TM_DIO are both high. ; Command byte: 0100tfr0 Data t: 0=normal, 1=test mode, ; f: 0=auto increment, 1=no increment, ; r: 0=write, 1=read ; 1100aaaa Address aaaa=Character address (0= GRID1 > 5= GRID6) ; 6 or 7 are ignored ; 1000dwww Display and control d: 0=off, 1=on ; w: duty cycle 000=1/16, 001=1/8, 010=1/4 ; 011=5/8, 100=11/16, 101=3/4, 110=13/16, 111=7/8 ; TM_cmd 8 words, duration 158 (=13+137+8) µs, assuming processor is 4 MHz TM_cmd movlw 1<- | | raise CLK (bit n) call delay ; | | | decfsz TM_cnt,F ; | | | if not yet bit 7, then: goto TM_wlp ; | | | repeat ;TM_ack 8 words, 9 steps TM_ack clrf GPIO ;-<- | | lower CLK last bit, keep DIO latch low bsf STATUS,RP0 ;| | | bsf TRISIO,TM_DIO ;| ->- allow DIO high (by pull-up) bcf STATUS,RP0 ;| | reselect bank 0 movlw 1<- | end byte transfer delay return ;done ;------------------------------------------------------------------------------- ; Subroutine to read byte from TM1637. Returns key scan code in TM_dat. ; Entrypoint is: TM_rdk ; Assume CLK is initialized as output and high, and DIO as input. ; TM_rdk 13 words, duration 5+9*8= 77*8 µs, assuming processor is 4 MHz TM_rdk clrf TM_dat ; | initialize all bits 0 in result setc ; | set terminal marker rrf TM_dat,F ; | shift marker in collect byte, clear carry TM_rlp clrf GPIO ;-<- lower CLK, keep DIO latch low movlw 1<- raise CLK, keep other latches low skpc ; | if not last bit received, then: goto TM_rlp ; | repeat bit read goto TM_ack ; | append with acknowledge sequence ;------------------------------------------------------------------------------- ; Subroutine to terminate transmission with TM1637. ; Entrypoint is: TM_stp ; TM_stp 11 words, duration 12 µs, assuming processor is 4 MHz TM_stp clrf GPIO ;-<- | ensure CLK and DIO latch is low bsf STATUS,RP0 ;| | select bank 1 bcf TRISIO,TM_DIO ;| | force DIO low bcf STATUS,RP0 ;| | reselect bank 0 movlw 1<- | raise CLK, keep DIO latch low bsf STATUS,RP0 ; | | select bank 1 bsf TRISIO,TM_CLK ; | | allow CLK go high bsf TRISIO,TM_DIO ; | ->- allow DIO go high (by pull-up) bcf STATUS,RP0 ; | | reselect bank 0 return ;done